I do wonder in today’s landscape of single board computers what the right bit width is. A 64-bit system with like 1-2GB or RAM doesn’t make a ton of sense since your program size and data structure size grows by quite a bit but you don’t need it to since you don’t get to have more than 4GB of RAM. On the other hand there you do have SBCs with 8-16GBs of RAM but that’s a far cry from needing full 64 bits. Would an optimal bit width be 48 bits? 40?
32-bit ARM-based systems supported up to 1 TB of RAM. 32-bit x86 only up to 64 GB. Unless you want to map more than 4 GB in a single process, you could very well stay 32-bit.
But AArch64 (or ARM64) and AMD64 did bring a lot more on the table than just larger address space. More registers, and a performance boost by just being better suited for the modern CPU core design.
32-bit x86 linux will typically support 3GB per process, with 1GB kernel address area, I think? (Windows did 2GB / 2GB split by default, custom boot options can change it to 3GB / 1GB, but only some 32-bit apps fully supported it, like photoshop).
Also, FWIW, security people can get real bothered that ASLR doesn't do much in 32-bit systems.
So, I think starting around 2GB DRAM, it's probably a "big enough" system to justify a 64-bit OS.
On 32 bit you can of course make the kernel higher half, but yes AFAIK most mainstream kernels chose higher quarter to grant more vaddr space to processes.
> But AArch64 (or ARM64) and AMD64 did bring a lot more on the table than just larger address space. More registers, and a performance boost by just being better suited for the modern CPU core design.
There is the x32 ABI - 32-bit pointer length, but the AMD64 ISA. I don’t think it ever saw significant adoption though.
32 bit gave you that much with PAE, which has its own set of unfortunate problems.
I still think it's pretty safe to say 64 bit is the future, and will be for a long time (if I live long enough for 128 bit processors to become defacto or even widely necessary I'll be truly shocked).
Many "64-bit" systems only have ~48 bits of virtual address space, and while canonical pointers have all the high bits equal, you can put the otherwise-wasted bits to work by storing metadata.
If you're writing really space-optimised code, you can pack pointers closer together.
Yes, this already happens. Address bus width is usually different from register width due to cost. I found this, old CPU's address bus only getting to 44 bits wide on Itanium.
For embedded uses, 1GB is certainly big enough to not need to be 32-bit, so it makes sense IMO to use the same 64-bit binaries/toolchains/BSPs as larger platforms, especially since they're better supported by upstreams now.
I think it's either 8, 32 or 64 bit. Maybe 16 bit.
The size of memory space is not necessarily aligned with the bit width of the CPU. There are a lot of 32 bit systems that can use much more than 4 GB of RAM. And there are no 64 bit systems I know of, that are even theoretically able to use 16 exabytes (16 million TB) of RAM.
AFAIK ARM32 is still the norm for embedded systems. And there is still a place for 8-bit microcontrollers.
