One architecture I know of that used its general purpose registers for floating point is the VAX. I have no thoughts on this though.

> Separate FP registers - This looks to have started when FPUs were optional and/or physically separate, but that's no longer the case.

Using a separate register set for FP is not just about making floats optional. It also allows to better isolate the float and int units and to build a more efficient micro-architecture.

For example: using a single physical register bank for floats and integers would be expensive (as the size of the register bank grows quadratically with the number of read/write ports), therefore using separate physical register bank for float and integer is more efficient.

I seem to remember the original Intel MMX aliased its integer SIMD registers with the x87 FPU registers (for compatibility with non-MMX OSes when saving/restoring state when switching between processes). I never wrote code for it, but I remember it was slow to switch between the two modes.

It does, which meant the ISA has the strange requirement that you have to emit an 'emms' instruction once you're done using MMX or else x87 operations won't work.

This makes MMX very unpopular outside controlled situations, so compiler autovectorization doesn't support it.