Some Arm processors that you can buy today also support dual-core lock step in hardware, such as the Jetson AGX Xavier from Nvidia. (however, not enabled by default for perf reasons, because you halve your cores by design in that mode)
Could you point us to the source of your information please? The Xavier does not support dual-core lockstep afaik. There are other methods in place to detect random faults, but not that one.
The first widely available ARM cores providing it are fairly new (at least in the automotive domain).
Very interesting, thank you very much! I know the lockstepped R5s and the dual execution feature of the Carmels (close but no cigar for ISO26262), but not that one. Gonna ask our FAE about it eventually. ;-D
It's there for safety reasons for automotive. (see https://blogs.nvidia.com/blog/2020/05/20/xavier-achieves-ind... )